From Laboratory to Silicon: Bridging the Gap for Implementation-Ready Algorithms in High-Speed Optical Communications

From Laboratory to Silicon: Bridging the Gap for Implementation-Ready Algorithms in High-Speed Optical Communications

Description: 

While academic research has proposed numerous sophisticated Digital Signal Processing (DSP) algorithms to approach the Shannon limit, the majority of these solutions remain theoretical due to their high computational complexity and power consumption. The verification of most algorithms are off-line experiment, in stead of real hardware (ASIC or FPGA). The "real-world" viability of an algorithm is no longer defined by performance alone, but by its hardware efficiency. This workshop focuses on the critical transition from offline simulation, evaluation to real-time ASIC/SoC implementation. 

Time: TBD

Venue: TBD

Organizers:

TBD

Speakers:

TBD